The importance of defects in semiconductor materials, such as single crystalline silicon, is generally recognized with respect to the physical, optical and electronic properties of these materials. Diffusion rates of dopants during annealing processing, for example, have been demonstrated to depend significantly on the type and abundance of defects, such as interstitials and vacancies, in implanted silicon. In addition, the presence of defects in bulk semiconductor materials has been shown to impact other important physical properties such as current flow in integrated circuits and the performance of photoactive devices and gas sensors. Defects provide sites where electrons and holes recombine with enhanced efficiency, for example, which is understood to significantly degrade the performance of host materials in diverse applications ranging from optoelectronics to photocatalysis.
Given the role of defects in semiconductor device performance, substantial research is currently directed at developing methods of engineering various kinds of defects in the bulk phase of semiconductor substrates so as to enhance dopant activation and limit dopant diffusion and loss during annealing. These methods include the use of implanted foreign atoms, such as carbon or halogens, dislocation loops, and co-implantation with high energy ions. Such defect engineering approaches have played a significant role in advanced processes for ion implantation in ultra-shallow junctions.
U.S. Pat. No. 7,846,822, issued on Dec. 7, 2010, discloses a different approach for defect engineering wherein modification of the composition of semiconductor surfaces allows for control of the concentrations and depth profiles of defects, such as interstitials and vacancies, in supersaturated and undersaturated semiconductor materials. The '822 patent demonstrates that such chemical modification of semiconductor surfaces allows for fabrication of doped semiconductor structures having a selected dopant concentration depth profile, for example to provide ultrashallow junctions in microelectronic and nanoelectronic devices.
While substantial research has been directed to controlling defects in single crystalline silicon, much less attention has been focused on engineering defects in other materials, including other semiconductors and dielectric materials. It will, therefore, be appreciated from the foregoing that there is currently a need in the art for methods for controlling the type and abundance of defects generally applicable to a range of useful crystalline semiconductor materials. Particularly, defect engineering methods are needed that are capable of selectively adjusting the physical, optical and electronic properties of materials used in semiconductor devices.